In a computer system, transfers of information between devices such as processors, memory controllers, and input/output units typically occur over a bus. Devices that transmit and receive data over a bus usually can control the bus at certain times. These devices are called bus agents. Examples of bus agents include processors and memory controllers. Information is usually transmitted between agents as voltage levels that are interpreted at a receiver as representing digital ones or digital zeros. Voltage levels below a certain level are interpreted as having a logic value of zero, and voltage levels over a certain level are interpreted as having a logic value of one. As signals travel through the computer system, they pick up noise. Noise is extraneous signals capacitively or inductively coupled to a digital signal line from inside or outside the system. Types of noise include core noise, or die noise generated by a particular integrated circuit die of the system. Types of noise also include system noise. System noise includes, for example, noise picked up by a signal from the environment through which it passes. System noise can be noise from the traces on a printed circuit board (PCB), noise from coaxial cable, noise from ribbon cable, or noise from any other electrical signal carrying medium.
In general, digital systems tolerate noise well because as long as a signal is interpreted correctly as high (indicating a one) or low (indicating a zero), no transmission errors occur. When noise becomes excessive, however, signals may go outside the noise margin. The noise margin is defined in terms of a high noise margin, affecting signals that should be interpreted as logic one, and a low noise margin, affecting signals that should be interpreted as logic zero. The high noise margin is defined as the difference between a minimum output voltage that will be available at a gate output when the output is supposed to be a logic one, and a minimum gate input voltage that will be unambiguously recognized by the gate as corresponding to a logic one. The low noise margin is defined as the difference between a maximum gate input voltage which will be unambiguously recognized by the gate as corresponding to a logic zero, and a maximum voltage that will be available at a gate output when the output is supposed to be logic zero.
Some signaling methods used by prior art computer systems take no steps to reduce the effects of noise. For example, in a system using standard complimentary metal oxide semiconductor (CMOS) components and standard single-ended switching, signals are sent and received with any noise they may have picked up. It is assumed that the noise margin will be great enough so that a receiving component can extract information from the signal without errors.
In some systems, for example in CMOS systems, it is often difficult to determine at what voltage a receiving circuit will switch logic values between one and zero. One reason the switching voltage may vary is that process variations exist between components. To control the voltage at which a receiver component will switch, some manufacturers transmit a reference voltage (Vref) signal to a differential receiver along with the information signal. The Vref level determines at what voltage the receiver will switch. FIG. 1 is a block diagram of prior art system 100 which uses such a Vref signaling scheme.
Referring to FIG. 1, a single reference voltage is established using a resistor divider (resistors 108 and 110) from voltage source 130. Any voltage source may be used to establish Vref. Vref signal line 118 carries the Vref signal. Decoupling capacitor 116 is at the point of Vref generation. Decoupling capacitors 102, 104 and 106 are each at a pin of a system agent.
System 100 includes agents 101(1), 101(2), through 101(n). Each of agents 101(1), 101(2), through 101(n) receive a Vref signal on Vref signal line 118. System 100 also includes information signal lines 120(1), 120(2), through 120(n). Each of information signal lines 120(1), 120(2), through 120(n) is carefully routed and terminated, for example with terminating resistors 112 and 114. Each of agents 101(1), 101(2), through 101(n) is a differential receiver that receives both the Vref signal over unrouted Vref signal line 118 and the information signals over routed information signal lines 120. No attempt is made to match the routing of Vref signal line 118 to the routing of any of information signal lines 120(1), 120(2), through 120(n). Therefore, any noise present on information signal lines 120(1), 120(2), through 120(n) is not likely to match noise on Vref signal line 118. These disparities in noise may cause a differential receiver to incorrectly interpret information signals.
This reference voltage signaling scheme was adequate in prior systems that operated at relatively low frequencies and with relatively high noise margins. Prior schemes are inadequate, however, in current, higher performance computer systems that operate at higher frequencies with lower noise margins. The lower signal settling times associated with higher frequency operation sometimes do not allow a signal to settle to a level within the lower noise margin before an attempt is made to interpret the signal.
Another prior art signaling scheme, known as differential signaling, uses two lines for each information signal. According to this method, for each signal sent on a line, a compliment of the signal is sent on a corresponding line. Both the signal and the compliment of the signal are sent to a differential receiver. The routing of the two lines carrying the signal and the compliment of the signal should be matched so that if noise is injected onto one signal, substantially the same noise should be injected onto the compliment of the signal. When the routing of lines is matched, characteristics such as length, impedance, velocity factor, and coupling of lines are made to be substantially the same. Matching the routing of lines may or may not involve routing lines in physical proximity to one another. Physical proximity is not important if the characteristics listed above are substantially the same between the lines whose routings are to be matched.
The differential receiver processes both signals received such that it perceives the difference between the signals, which should be substantially the same if both include very similar noise components. This signaling scheme has advantages over the previously described single-ended switching schemes. For example, even if noise levels are very high, noise on the complimentary signals should be effectively cancelled out by the receiver, so there is less danger of exceeding the noise margin.
True differential signaling schemes, in which each information signal line is paired with a complimentary signal line, have serious disadvantages. Most significantly, twice the physical area is used as compared to single-ended switching because one reference voltage signal line is required to be routed for each information signal line. In addition, pin count is increased because one reference voltage signal pin is required for each information signal pin.